Day 6: The VCP, VRAM, & Clock Domain Issues

So over the last couple of days I started work on the video co-processor (from here on I think I’ll refer to as the VCP) of the Athena. The goal of this co-processor is to get two independently scrolling tilemap layers, 128 sprites, and 256 onscreen colors. This turned out to be a bit ofContinue reading “Day 6: The VCP, VRAM, & Clock Domain Issues”

Day 4: The memory bus and a running CPU program

So last time I got a Motorola 68K up and running, cycling through its entire address space and attempting to execute a dummy instruction. However, in order to get the CPU running an actual program, I need to hook up an actual bus to it. I ended up having to do a hell of aContinue reading “Day 4: The memory bus and a running CPU program”

Day 3: Free-running a Motorola 68K

So today I set about getting a Motorola 68K up and running on my FPGA board. My goal was relatively simple: just get an M68K working, fed dummy 0 values on its data pins and tying the top two bits of its output address pins to a pair of LEDs. As the M68K runs, itContinue reading “Day 3: Free-running a Motorola 68K”